AVR Basic Compiler Library Support
The library support is a new way for the basic statements implementation.
This is indeed an advanced feature, however that is a way that can be used by both the author and the users to extend the compiler language from the external library files.
The information is loaded by the compiler from the external textual .lib files stored in the OshonSoft application data folder.
OshonSoft .lib files are well documented with comments covering all the currently available features of the library support compiler engine.
Library files can be edited by Notepad, or any other plain text editor.
Library files selection:
• oshonsoftavr.lib
• oshonsoftavr-adc.lib
• oshonsoftavr-uart.lib
oshonsoftavr.lib file:
//the concept is that one library group contains the implementation of one new language functionality - one or more related statements or functions
//library items contain different implementations of the same functionality for different groups of microcontrollers
//#lib_item_begin must be followed by #processor
//#statement_begin, #statement_type, #argument sequence must be fulfilled for proper library load
//#processor comma-separated list of processors, x can be used as a wild card character
//#processor can be used in multiple lines to quote all devices if needed
//#parameter is used to implement #define parameters needed for the statement implementation
//#parameter const, parameter_name, allowed_range, default_value
//#parameter symbol, parameter_name, type (pin, bit, byte, address of), system_bit or system_register
//'pin' type is used for the bits in the PORT registers
//'address of' type will implement a constant parameter
//#variable is used to declare global system variables
//#variable variable_name, type (byte, word, long, single, string)
//#statement_begin statement_name [argument1_name[, argument2_name[, ...]]]
//#statement_type type (procedure; inline; function, f_type (byte, word, long, single, string))
//#argument argument_name, type (const xx, byte, byte system xx, word, word system xx, long, long system xx, single, string), passing_type
//the default type of the system variables can not be changed with #argument
//passing_type (byval, byval allowed_constant_range, byref, byrefout) for statement_type procedure and inline
//passing_type (byval, byval allowed_constant_range) for statement_type function
//allowed_constant_range can contain arithmetic expressions in brackets, like 0-[EEPROM_Num-1]
//used to define parameters and statements that are not available or not applicable for the current item devices
//#parameter n/a, parameter_name
//#statement n/a, statement_name
//used to define alternative names for the parameter and statement names defined in the library group
//#alias_for <library_defined_element_name>, <new_alternative_name>
//used to define code variations among processors when only one or more register names in the code should be replaced with their alternatives
//#alternate_reg_name <register_name_used_in_code>, <alternate_register_name>
//code section can contain both inline assembler and basic language lines of code
//symbol and const parameters can be used directly in the assembler lines of code
//calculate[] or calc[] macro is available for double precision calculations
//calculate[] must be used to enter the parameter value in the basic code, will be replaced with the value of the parameter
//calculate[] can be used to perform one arithmetic operation, will be replaced with the value of the result
//calc[] arithmetic operators: +, -, *, /, % (modulus or remainder operator), \ (division returning integer result)
//calc[] macros can be nested
//reg_addr[] macro will be replaced with the register address; if not found, -1 is returned
//Clock_Freq in MHz is available as an argument
//Flash_Num and EEPROM_Num (total number of memory locations) are available as arguments
//int_val() and abs_val() functions are available for getting integer or absolute values of the argument
//int_val() and abs_val() can be used on one or both arguments in calc[] expression, and/or on the whole expression
//#if [], #endif macro is available
//#if comparison operators: ==,<>,<,>,<=,>=
//#if [] macro can be used without #endif when followed by one operation in the same line
//for example: #if [libtemp3 > 0.5] #math libtemp2 = calc[libtemp2 + 1]
//for example: #if [ADC_Ref > 3] sbr R30,0x10
//'const' statement argument type can be used to load the numeric value into one of the library engine temp variables libtemp0-libtemp99
//for const arguments only 'byval' and 'byval allowed_constant_range' passing types are allowed
//#math directive is used to assign numeric value or the result of calc[] expression to one libtempxx variable
//for example: #math libtemp8 = calc[calc[Clock_Freq * 1000000] / calc[calc[libtemp2 + 1] * 4]] //exact baud rate achieved
//#if macro also works with libtemp0-libtemp99 variables
//desired info can be inserted as a comment in the generated assembler source with the #echo directive
//#echo is followed by a string that can contain temp variable names to be replaced with their numeric values
//for example: #echo "exact baud rate achieved = libtemp8; bit period = libtemp7µs; baud rate error = libtemp6%"
//when calling 'procedure' type statements with one 'byval' byte argument declared, library engine will accept multiple comma-separated arguments
//for that purpose #statement_accept_multiple_arguments directive should be placed after #statement_type
//variables are passed byte by byte starting from the lowest byte; string constants can be used, along with symbolic constants Qt, CrLf, Cr, Lf
//decimal representation of a variable can be passed to the procedure by using the # prefix before the variable name
//#break_for_string_argument directive
//for string variables and decimal representations (argument in the form #variable_name)
//library engine will load XHL register (X-register) with address of zero-terminated string prepared in memory
//and call the procedure at position of the #break_for_string_argument directive in the procedure code
//when calling 'procedure' type statements with one 'byrefout' byte argument declared, library engine will also accept multiple comma-separated arguments
//variables are filled in byte by byte starting from the lowest byte
//be careful that basic statements like WaitUs also make use of the system registers and can alter those values
//special function registers are declared in basic code as byte variables; if needed, this byte variable type can be changed with #redim directive
//#redim register_name new_type (byte, word, long, single)
//list of available compiler system byte registers: R16, R17, R18, R19, R20, R21, R22, R23, R24, R25
//list of available compiler system byte registers: R26 (XL), R27 (XH), R28 (YL), R29 (YH), R30 (ZL), R31 (ZH)
//list of available compiler system byte registers: R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15
//list of available compiler system word registers: R1716, R1918, R2120, R2322, R2524
//list of available compiler system word registers: R2726 (XHL), R2928 (YHL), R3130 (ZHL)
//list of available compiler system word registers: R1R0, R3R2, R5R4, R7R6, R9R8, R1110, R1312, R1514
//list of available compiler system long registers: R19181716, R23222120, R27262524, R31302928
//the compiler holds zero value in R15 system register
//the compiler uses R16 system register as working register
//registers R16-R31 are much better covered by AVR instruction set
oshonsoftavr-adc.lib file:
#lib_name OshonSoft ADC Module Library
//ADC_Read statement
#lib_group_begin
//for backward compatibility
#alias_for ADC_Sample_uS, ADC_SAMPLEUS
#alias_for ADC_Clk, ADC_CLOCK
#alias_for ADC_Ref, ADC_VREF
#alias_for ADC_Read, Adcin
#lib_item_begin
//ADMUX, i/o space 0-31,
//REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0
//ADCSRA, i/o space 0-31,
//ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
//ADEN ADSC ADFR ADIF ADIE ADPS2 ADPS1 ADPS0 //v2
//ADCL, i/o space 0-31,
//ADCH, i/o space 0-31,
#processor mega16
#processor mega16a
#processor mega32
#processor mega32a
#processor mega64
#processor mega64a
#processor mega128 //v2
#processor mega128a //v2
#processor mega8535
#processor tiny26 //v2
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 6
#parameter const, ADC_Ref, 0-3, 0
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-31
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
andi R31,0x1f
ori R31,calc[ADC_Ref * 64]
out ADMUX,R31
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
out ADCSRA,R30
//
WaitUs calculate[ADC_Sample_uS]
//
sbi ADCSRA,ADSC
sbis ADCSRA,ADIF
rjmp PC-1
sbi ADCSRA,ADIF
cbi ADCSRA,ADEN
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//ADMUX, i/o space 0-31,
//REFS1 REFS0 ADLAR – MUX3 MUX2 MUX1 MUX0
//ADCSRA, i/o space 0-31,
//ADEN ADSC ADFR ADIF ADIE ADPS2 ADPS1 ADPS0
//ADCL, i/o space 0-31,
//ADCH, i/o space 0-31,
#processor mega8
#processor mega8a
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 6
#parameter const, ADC_Ref, 0-3, 0
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-15
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
andi R31,0x0f
ori R31,calc[ADC_Ref * 64]
out ADMUX,R31
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
out ADCSRA,R30
//
WaitUs calculate[ADC_Sample_uS]
//
sbi ADCSRA,ADSC
sbis ADCSRA,ADIF
rjmp PC-1
sbi ADCSRA,ADIF
cbi ADCSRA,ADEN
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//ADMUX, i/o space 0-31,
//– ADCBG – – – MUX2 MUX1 MUX0
//– – – – – MUX2 MUX1 MUX0 //v2
//ADCSR, i/o space 0-31,
//ADEN ADSC ADFR ADIF ADIE ADPS2 ADPS1 ADPS0
//ADCL, i/o space 0-31,
//ADCH, i/o space 0-31,
#processor 90s4433
#processor 90s8535 //v2
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 6
#parameter n/a, ADC_Ref
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-7
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
andi R31,0x07
out ADMUX,R31
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
out ADCSR,R30
//
WaitUs calculate[ADC_Sample_uS]
//
sbi ADCSR,ADSC
sbis ADCSR,ADIF
rjmp PC-1
sbi ADCSR,ADIF
cbi ADCSR,ADEN
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//ADMUX, i/o space 0-31,
//REFS1 REFS0 MUX5 MUX4 MUX3 MUX2 MUX1 MUX0
//ADCSRA, i/o space 0-31,
//ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
//ADCSRB, i/o space 0-31,
//BIN ACME – ADLAR – ADTS2 ADTS1 ADTS0
//ADCL, i/o space 0-31,
//ADCH, i/o space 0-31,
#processor tiny24, tiny44, tiny84
#processor tiny24a, tiny44a, tiny84a
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 6
#parameter const, ADC_Ref, 0-3, 0
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-63
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
cbi ADCSRB,ADLAR
andi R31,0x3f
ori R31,calc[ADC_Ref * 64]
out ADMUX,R31
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
out ADCSRA,R30
//
WaitUs calculate[ADC_Sample_uS]
//
sbi ADCSRA,ADSC
sbis ADCSRA,ADIF
rjmp PC-1
sbi ADCSRA,ADIF
cbi ADCSRA,ADEN
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//ADMUX, i/o space 0-31,
//REFS1 REFS0 ADLAR REFS2 MUX3 MUX2 MUX1 MUX0
//ADCSRA, i/o space 0-31,
//ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
//ADCL, i/o space 0-31,
//ADCH, i/o space 0-31,
#processor tiny25, tiny45, tiny85
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 6
#parameter const, ADC_Ref, 0-7, 0
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-15
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
andi R31,0x0f
ori R31,calc[calc[calc[ADC_Ref % 4] * 64] + calc[calc[ADC_Ref \ 4] * 16]]
out ADMUX,R31
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
out ADCSRA,R30
//
WaitUs calculate[ADC_Sample_uS]
//
sbi ADCSRA,ADSC
sbis ADCSRA,ADIF
rjmp PC-1
sbi ADCSRA,ADIF
cbi ADCSRA,ADEN
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//ADMUX, i/o space 0-31,
//– REFS0 ADLAR – – – MUX1 MUX0
//ADCSRA, i/o space 0-31,
//ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
//ADCL, i/o space 0-31,
//ADCH, i/o space 0-31,
#processor tiny13
#processor tiny13a
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 6
#parameter const, ADC_Ref, 0-1, 0
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-3
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
andi R31,0x03
ori R31,calc[ADC_Ref * 64]
out ADMUX,R31
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
out ADCSRA,R30
//
WaitUs calculate[ADC_Sample_uS]
//
sbi ADCSRA,ADSC
sbis ADCSRA,ADIF
rjmp PC-1
sbi ADCSRA,ADIF
cbi ADCSRA,ADEN
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//ADMUX, i/o space 0-31,
//REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0
//ADCSRA, i/o space 0-31,
//ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
//ADCSRB, i/o space 0-31,
//BIN GSEL - REFS2 MUX5 ADTS2 ADTS1 ADTS0
//ADCL, i/o space 0-31,
//ADCH, i/o space 0-31,
#processor tiny261, tiny461, tiny861
#processor tiny261a, tiny461a, tiny861a
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 6
#parameter const, ADC_Ref, 0-7, 0
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-63
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
in R30,ADCSRB
bst R31,5
bld R30,3
#if [ADC_Ref > 3] sbr R30,0x10
#if [ADC_Ref <= 3] cbr R30,0x10
out ADCSRB,R30
andi R31,0x1f
ori R31,calc[calc[ADC_Ref % 4] * 64]
out ADMUX,R31
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
out ADCSRA,R30
//
WaitUs calculate[ADC_Sample_uS]
//
sbi ADCSRA,ADSC
sbis ADCSRA,ADIF
rjmp PC-1
sbi ADCSRA,ADIF
cbi ADCSRA,ADEN
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//ADMUXA, i/o space 0-31,
//– – MUX5 MUX4 MUX3 MUX2 MUX1 MUX0
//ADMUXB, i/o space 0-31,
//REFS2 REFS1 REFS0 – – – GSEL1 GSEL0
//ADCSRA, i/o space 0-31,
//ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
//ADCSRB, i/o space 0-31,
//– – – – ADLAR ADTS2 ADTS1 ADTS0
//ADCL, i/o space 0-31,
//ADCH, i/o space 0-31,
#processor tiny441, tiny841
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 6
#parameter const, ADC_Ref, 0-7, 0
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-63
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
cbi ADCSRB,ADLAR
andi R31,0x3f
out ADMUXA,R31
in R30,ADMUXB
andi R30,0x1f
ori R30,calc[ADC_Ref * 32]
out ADMUXB,R30
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
out ADCSRA,R30
//
WaitUs calculate[ADC_Sample_uS]
//
sbi ADCSRA,ADSC
sbis ADCSRA,ADIF
rjmp PC-1
sbi ADCSRA,ADIF
cbi ADCSRA,ADEN
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//ADMUX, i/o space 0-31,
//REFS1 REFS0 REFEN ADC0EN MUX3 MUX2 MUX1 MUX0
//ADCSRA, i/o space 0-31,
//ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
//ADCSRB, i/o space 0-31,
//VDEN VDPD – – ADLAR ADTS2 ADTS1 ADTS0
//ADCL, i/o space 0-31,
//ADCH, i/o space 0-31,
#processor tiny1634
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 6
#parameter const, ADC_Ref, 0-3, 0
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-15
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
cbi ADCSRB,ADLAR
andi R31,0x0f
ori R31,calc[ADC_Ref * 64]
out ADMUX,R31
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
out ADCSRA,R30
//
WaitUs calculate[ADC_Sample_uS]
//
sbi ADCSRA,ADSC
sbis ADCSRA,ADIF
rjmp PC-1
sbi ADCSRA,ADIF
cbi ADCSRA,ADEN
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//ADMUX, i/o space ext,
//REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0
//ADCSRA, i/o space ext,
//ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
//ADCL, i/o space ext,
//ADCH, i/o space ext,
#processor mega164p, mega324p, mega644p
#processor mega164a, mega164pa, mega324a, mega324pa, mega644a, mega644pa, mega1284, mega1284p
#processor mega165
#processor mega165p
#processor mega165a, mega165pa, mega325a, mega325pa, mega3250a, mega3250pa, mega645a, mega645p, mega6450a, mega6450p
#processor mega169
#processor mega169p
#processor mega169a, mega169pa, mega329a, mega329pa, mega649a, mega649p, mega3290a, mega3290pa, mega6490a, mega6490p
#processor mega325, mega3250, mega645, mega6450
#processor mega325p, mega3250p
#processor mega644
#processor mega329, mega3290, mega649, mega6490
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 6
#parameter const, ADC_Ref, 0-3, 0
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-31
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
andi R31,0x1f
ori R31,calc[ADC_Ref * 64]
sts ADMUX,R31
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
sts ADCSRA,R30
//
WaitUs calculate[ADC_Sample_uS]
//
lds R30,ADCSRA
sbr R30,0x40 //ADSC
sts ADCSRA,R30
l1:
lds R30,ADCSRA
sbrs R30,ADIF
rjmp l1
ldi R30,calc[calc[ADC_Clk] + 16] //16-ADIF
sts ADCSRA,R30
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//ADMUX, i/o space ext,
//REFS1 REFS0 ADLAR – MUX3 MUX2 MUX1 MUX0
//ADCSRA, i/o space ext,
//ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
//ADCL, i/o space ext,
//ADCH, i/o space ext,
#processor mega48, mega88, mega168
#processor mega48a, mega48pa, mega88a, mega88pa, mega168a, mega168pa, mega328, mega328p
#processor mega48p, mega88p, mega168p
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 6
#parameter const, ADC_Ref, 0-3, 0
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-15
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
andi R31,0x0f
ori R31,calc[ADC_Ref * 64]
sts ADMUX,R31
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
sts ADCSRA,R30
//
WaitUs calculate[ADC_Sample_uS]
//
lds R30,ADCSRA
sbr R30,0x40 //ADSC
sts ADCSRA,R30
l1:
lds R30,ADCSRA
sbrs R30,ADIF
rjmp l1
ldi R30,calc[calc[ADC_Clk] + 16] //16-ADIF
sts ADCSRA,R30
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//ADMUX, i/o space ext,
//REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0
//ADCSRA, i/o space ext,
//ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
//ADCSRB, i/o space ext,
//– ACME – – MUX5 ADTS2 ADTS1 ADTS0
//ADCL, i/o space ext,
//ADCH, i/o space ext,
#processor mega640, mega1280, mega1281, mega2560, mega2561
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 6
#parameter const, ADC_Ref, 0-3, 0
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-63
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
bst R31,5
lds R30,ADCSRB
bld R30,3
sts ADCSRB,R30
andi R31,0x1f
ori R31,calc[ADC_Ref * 64]
sts ADMUX,R31
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
sts ADCSRA,R30
//
WaitUs calculate[ADC_Sample_uS]
//
lds R30,ADCSRA
sbr R30,0x40 //ADSC
sts ADCSRA,R30
l1:
lds R30,ADCSRA
sbrs R30,ADIF
rjmp l1
ldi R30,calc[calc[ADC_Clk] + 16] //16-ADIF
sts ADCSRA,R30
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//ADMUX, i/o space ext,
//REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0
//ADCSRA, i/o space ext,
//ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
//ADCSRB, i/o space ext,
//ADHSM ISRCEN AREFEN - ADTS3 ADTS2 ADTS1 ADTS0
//ADCL, i/o space ext,
//ADCH, i/o space ext,
#processor mega16m1, mega32m1, mega64m1
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 3
#parameter const, ADC_Ref, 0-3, 0
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-31
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
ADCSRB = 0xa0 //ADC High Speed Mode, Analog Reference pin Enable
andi R31,0x1f
ori R31,calc[ADC_Ref * 64]
sts ADMUX,R31
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
sts ADCSRA,R30
//
WaitUs calculate[ADC_Sample_uS]
//
lds R30,ADCSRA
sbr R30,0x40 //ADSC
sts ADCSRA,R30
l1:
lds R30,ADCSRA
sbrs R30,ADIF
rjmp l1
ldi R30,calc[calc[ADC_Clk] + 16] //16-ADIF
sts ADCSRA,R30
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//ADMUX, i/o space ext,
//REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0
//ADCSRA, i/o space ext,
//ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
//ADCSRB, i/o space ext,
//ADHSM ACME MUX5 – ADTS3 ADTS2 ADTS1 ADTS0
//ADCL, i/o space ext,
//ADCH, i/o space ext,
#processor mega16u4, mega32u4
#parameter const, ADC_Sample_uS, 0-255, 20
#parameter const, ADC_Clk, 0-7, 3
#parameter const, ADC_Ref, 0-3, 0
#statement_begin ADC_Read adc_channel, adc_result
#statement_type procedure
#argument adc_channel, byte system R31, byval 0-63
#argument adc_result, word system ADCL, byrefout
#code_begin
//
#redim ADCL word
ADCSRB = 0xa0 //ADC High Speed Mode
bst R31,5
lds R30,ADCSRB
bld R30,5
sts ADCSRB,R30
andi R31,0x1f
ori R31,calc[ADC_Ref * 64]
sts ADMUX,R31
ldi R30,calc[calc[ADC_Clk + 128] + 16] //16-ADIF, 128-ADEN
sts ADCSRA,R30
//
WaitUs calculate[ADC_Sample_uS]
//
lds R30,ADCSRA
sbr R30,0x40 //ADSC
sts ADCSRA,R30
l1:
lds R30,ADCSRA
sbrs R30,ADIF
rjmp l1
ldi R30,calc[calc[ADC_Clk] + 16] //16-ADIF
sts ADCSRA,R30
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
#processor mega8515
#processor mega162
#processor mega8u2, mega16u2, mega32u2
#processor 90s2313
#processor 90s2323, 90s2343
#processor 90s8515
#processor tiny2313
#processor tiny2313a, tiny4313
#parameter n/a, ADC_Sample_uS
#parameter n/a, ADC_Clk
#parameter n/a, ADC_Ref
#statement n/a, ADC_Read
#lib_item_end
#lib_group_end
oshonsoftavr-uart.lib file:
#lib_name OshonSoft UART Library
//UART_Init, UART_Write, UART_Read, UART_Get statements
#lib_group_begin
#alias_for UART_Init, UART0_Init
#alias_for UART_Write, UART0_Write
#alias_for UART_Read, UART0_Read
#alias_for UART_Get, UART0_Get
//for backward compatibility
#alias_for UART_Init, Hseropen
#alias_for UART_Write, Hserout
#alias_for UART_Read, Hserin
#alias_for UART_Get, Hserget
#lib_item_begin
//UCSRA, i/o space 0-31,
//RXC TXC UDRE FE DOR PE U2X MPCM
//UCSRB, i/o space 0-31,
//RXCIE TXCIE UDRIE RXEN TXEN UCSZ2 RXB8 TXB8
//UCSRC, i/o space 32-63,
//URSEL UMSEL UPM1 UPM0 USBS UCSZ1 UCSZ0 UCPOL
//UDR, i/o space 0-31,
//UBRRL, i/o space 0-31,
//UBRRH, i/o space 32-63,
//URSEL – – – UBRR11 UBRR10 UBRR9 UBRR8
#processor mega8
#processor mega8a
#processor mega16
#processor mega16a
#processor mega32
#processor mega32a
#processor mega8515
#processor mega8535
#statement_begin UART_Init baud_rate
#statement_type inline
#argument baud_rate, const libtemp0, byval 100-1000000
#code_begin
//
#math libtemp10 = 1 //baud rate generator mode
#math libtemp1 = calc[calc[calc[calc[Clock_Freq * 1000000] / libtemp0] / 8] - 1]
#if [libtemp1 > 4090]
#math libtemp10 = 2 //baud rate generator mode
#math libtemp1 = calc[calc[calc[calc[Clock_Freq * 1000000] / libtemp0] / 16] - 1]
#endif
#math libtemp2 = calc[int_val(libtemp1)] //UBRR value
#math libtemp3 = calc[abs_val(libtemp2 - libtemp1)]
#if [libtemp3 > 0.5] #math libtemp2 = calc[libtemp2 + 1]
//
#if [libtemp10 == 1] #math libtemp8 = calc[calc[Clock_Freq * 1000000] / calc[calc[libtemp2 + 1] * 8]] //exact baud rate achieved
#if [libtemp10 == 2] #math libtemp8 = calc[calc[Clock_Freq * 1000000] / calc[calc[libtemp2 + 1] * 16]] //exact baud rate achieved
#math libtemp7 = calc[1000000 / libtemp8] //bit period
#math libtemp6 = calc[calc[calc[abs_val(libtemp8 - libtemp0)] / libtemp0] * 100] //baud rate error
#math libtemp6 = calc[int_val(calc[libtemp6 * 100]) / 100] //round to 2 decimal places
#echo "exact baud rate achieved = libtemp8; bit period = libtemp7µs; baud rate error = libtemp6%"
//
ldi R16,calc[libtemp2 % 256]
out UBRRL,R16
ldi R16,calc[libtemp2 \ 256]
out UBRRH,R16
#if [libtemp10 == 1] ldi R16,0x42 //TXC, U2X
#if [libtemp10 == 2] ldi R16,0x40 //TXC
out UCSRA,R16
ldi R16,0x86 //URSEL, UCSZ1, UCSZ0
out UCSRC,R16
ldi R16,0x18 //RXEN, TXEN
out UCSRB,R16
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//UCSRA, i/o space 0-31,
//RXC TXC UDRE FE DOR UPE U2X MPCM
//UCSRB, i/o space 0-31,
//RXCIE TXCIE UDRIE RXEN TXEN UCSZ2 RXB8 TXB8
//UCSRC, i/o space 0-31,
//– UMSEL UPM1 UPM0 USBS UCSZ1 UCSZ0 UCPOL
//UMSEL1 UMSEL0 UPM1 UPM0 USBS UCSZ1 UCSZ0 UCPOL //v2
//UDR, i/o space 0-31,
//UBRRL, i/o space 0-31,
//UBRRH, i/o space 0-31,
//– – – – UBRR11 UBRR10 UBRR9 UBRR8
#processor tiny2313
#processor tiny2313a, tiny4313 //v2
#statement_begin UART_Init baud_rate
#statement_type inline
#argument baud_rate, const libtemp0, byval 100-1000000
#code_begin
//
#math libtemp10 = 1 //baud rate generator mode
#math libtemp1 = calc[calc[calc[calc[Clock_Freq * 1000000] / libtemp0] / 8] - 1]
#if [libtemp1 > 4090]
#math libtemp10 = 2 //baud rate generator mode
#math libtemp1 = calc[calc[calc[calc[Clock_Freq * 1000000] / libtemp0] / 16] - 1]
#endif
#math libtemp2 = calc[int_val(libtemp1)] //UBRR value
#math libtemp3 = calc[abs_val(libtemp2 - libtemp1)]
#if [libtemp3 > 0.5] #math libtemp2 = calc[libtemp2 + 1]
//
#if [libtemp10 == 1] #math libtemp8 = calc[calc[Clock_Freq * 1000000] / calc[calc[libtemp2 + 1] * 8]] //exact baud rate achieved
#if [libtemp10 == 2] #math libtemp8 = calc[calc[Clock_Freq * 1000000] / calc[calc[libtemp2 + 1] * 16]] //exact baud rate achieved
#math libtemp7 = calc[1000000 / libtemp8] //bit period
#math libtemp6 = calc[calc[calc[abs_val(libtemp8 - libtemp0)] / libtemp0] * 100] //baud rate error
#math libtemp6 = calc[int_val(calc[libtemp6 * 100]) / 100] //round to 2 decimal places
#echo "exact baud rate achieved = libtemp8; bit period = libtemp7µs; baud rate error = libtemp6%"
//
ldi R16,calc[libtemp2 % 256]
out UBRRL,R16
ldi R16,calc[libtemp2 \ 256]
out UBRRH,R16
#if [libtemp10 == 1] ldi R16,0x42 //TXC, U2X
#if [libtemp10 == 2] ldi R16,0x40 //TXC
out UCSRA,R16
ldi R16,0x06 //UCSZ1, UCSZ0
out UCSRC,R16
ldi R16,0x18 //RXEN, TXEN
out UCSRB,R16
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//UCSR0A, i/o space ext,
//RXC0 TXC0 UDRE0 FE0 DOR0 UPE0 U2X0 MPCM0
//UCSR0B, i/o space ext,
//RXCIE0 TXCIE0 UDRIE0 RXEN0 TXEN0 UCSZ02 RXB80 TXB80
//UCSR0C, i/o space ext,
//UMSEL01 UMSEL00 UPM01 UPM00 USBS0 UCSZ01 UCSZ00 UCPOL0
//– UMSEL0 UPM01 UPM00 USBS0 UCSZ01 UCSZ00 UCPOL0 //v2
//UDR0, i/o space ext,
//UBRR0L, i/o space ext,
//UBRR0H, i/o space ext,
//– – – – UBRR11 UBRR10 UBRR9 UBRR8
#processor mega48, mega88, mega168
#processor mega48p, mega88p, mega168p
#processor mega48a, mega48pa, mega88a, mega88pa, mega168a, mega168pa, mega328, mega328p
#processor mega165p //v2
#processor mega165a, mega165pa, mega325a, mega325pa, mega3250a, mega3250pa, mega645a, mega645p, mega6450a, mega6450p //v2
#processor mega169p //v2
#processor mega169a, mega169pa, mega329a, mega329pa, mega649a, mega649p, mega3290a, mega3290pa, mega6490a, mega6490p //v2
#processor mega325, mega3250, mega645, mega6450 //v2
#processor mega325p, mega3250p //v2
#processor mega329, mega3290, mega649, mega6490 //v2
#processor mega644
#statement_begin UART_Init baud_rate
#statement_type inline
#argument baud_rate, const libtemp0, byval 100-1000000
#code_begin
//
#math libtemp10 = 1 //baud rate generator mode
#math libtemp1 = calc[calc[calc[calc[Clock_Freq * 1000000] / libtemp0] / 8] - 1]
#if [libtemp1 > 4090]
#math libtemp10 = 2 //baud rate generator mode
#math libtemp1 = calc[calc[calc[calc[Clock_Freq * 1000000] / libtemp0] / 16] - 1]
#endif
#math libtemp2 = calc[int_val(libtemp1)] //UBRR value
#math libtemp3 = calc[abs_val(libtemp2 - libtemp1)]
#if [libtemp3 > 0.5] #math libtemp2 = calc[libtemp2 + 1]
//
#if [libtemp10 == 1] #math libtemp8 = calc[calc[Clock_Freq * 1000000] / calc[calc[libtemp2 + 1] * 8]] //exact baud rate achieved
#if [libtemp10 == 2] #math libtemp8 = calc[calc[Clock_Freq * 1000000] / calc[calc[libtemp2 + 1] * 16]] //exact baud rate achieved
#math libtemp7 = calc[1000000 / libtemp8] //bit period
#math libtemp6 = calc[calc[calc[abs_val(libtemp8 - libtemp0)] / libtemp0] * 100] //baud rate error
#math libtemp6 = calc[int_val(calc[libtemp6 * 100]) / 100] //round to 2 decimal places
#echo "exact baud rate achieved = libtemp8; bit period = libtemp7µs; baud rate error = libtemp6%"
//
ldi R16,calc[libtemp2 % 256]
sts UBRR0L,R16
ldi R16,calc[libtemp2 \ 256]
sts UBRR0H,R16
#if [libtemp10 == 1] ldi R16,0x42 //TXC0, U2X0
#if [libtemp10 == 2] ldi R16,0x40 //TXC0
sts UCSR0A,R16
ldi R16,0x06 //UCSZ01, UCSZ00
sts UCSR0C,R16
ldi R16,0x18 //RXEN0, TXEN0
sts UCSR0B,R16
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//UCSRA, i/o space ext,
//RXC TXC UDRE FE DOR UPE U2X MPCM
//UCSRB, i/o space ext,
//RXCIE TXCIE UDRIE RXEN TXEN UCSZ2 RXB8 TXB8
//UCSRC, i/o space ext,
//– UMSEL UPM1 UPM0 USBS UCSZ1 UCSZ0 UCPOL
//UDR, i/o space ext,
//UBRRL, i/o space ext,
//UBRRH, i/o space ext,
//– – – – UBRR11 UBRR10 UBRR9 UBRR8
#processor mega165
#processor mega169
#statement_begin UART_Init baud_rate
#statement_type inline
#argument baud_rate, const libtemp0, byval 100-1000000
#code_begin
//
#math libtemp10 = 1 //baud rate generator mode
#math libtemp1 = calc[calc[calc[calc[Clock_Freq * 1000000] / libtemp0] / 8] - 1]
#if [libtemp1 > 4090]
#math libtemp10 = 2 //baud rate generator mode
#math libtemp1 = calc[calc[calc[calc[Clock_Freq * 1000000] / libtemp0] / 16] - 1]
#endif
#math libtemp2 = calc[int_val(libtemp1)] //UBRR value
#math libtemp3 = calc[abs_val(libtemp2 - libtemp1)]
#if [libtemp3 > 0.5] #math libtemp2 = calc[libtemp2 + 1]
//
#if [libtemp10 == 1] #math libtemp8 = calc[calc[Clock_Freq * 1000000] / calc[calc[libtemp2 + 1] * 8]] //exact baud rate achieved
#if [libtemp10 == 2] #math libtemp8 = calc[calc[Clock_Freq * 1000000] / calc[calc[libtemp2 + 1] * 16]] //exact baud rate achieved
#math libtemp7 = calc[1000000 / libtemp8] //bit period
#math libtemp6 = calc[calc[calc[abs_val(libtemp8 - libtemp0)] / libtemp0] * 100] //baud rate error
#math libtemp6 = calc[int_val(calc[libtemp6 * 100]) / 100] //round to 2 decimal places
#echo "exact baud rate achieved = libtemp8; bit period = libtemp7µs; baud rate error = libtemp6%"
//
ldi R16,calc[libtemp2 % 256]
sts UBRRL,R16
ldi R16,calc[libtemp2 \ 256]
sts UBRRH,R16
#if [libtemp10 == 1] ldi R16,0x42 //TXC, U2X
#if [libtemp10 == 2] ldi R16,0x40 //TXC
sts UCSRA,R16
ldi R16,0x06 //UCSZ1, UCSZ0
sts UCSRC,R16
ldi R16,0x18 //RXEN, TXEN
sts UCSRB,R16
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//UCSRA, i/o space 0-31,
//RXC TXC UDRE FE OR – – –
//UCSRB, i/o space 0-31,
//RXCIE TXCIE UDRIE RXEN TXEN CHR9 RXB8 TXB8
//UDR, i/o space 0-31,
//UBRR, i/o space 0-31,
//UBRRHI, i/o space 0-31,
//– – – – UBRR11 UBRR10 UBRR9 UBRR8
#processor 90s4433
#statement_begin UART_Init baud_rate
#statement_type inline
#argument baud_rate, const libtemp0, byval 100-1000000
#code_begin
//
#math libtemp10 = 1 //baud rate generator mode
#math libtemp1 = calc[calc[calc[calc[Clock_Freq * 1000000] / libtemp0] / 16] - 1]
#math libtemp2 = calc[int_val(libtemp1)] //UBRR value
#math libtemp3 = calc[abs_val(libtemp2 - libtemp1)]
#if [libtemp3 > 0.5] #math libtemp2 = calc[libtemp2 + 1]
//
#math libtemp8 = calc[calc[Clock_Freq * 1000000] / calc[calc[libtemp2 + 1] * 16]] //exact baud rate achieved
#math libtemp7 = calc[1000000 / libtemp8] //bit period
#math libtemp6 = calc[calc[calc[abs_val(libtemp8 - libtemp0)] / libtemp0] * 100] //baud rate error
#math libtemp6 = calc[int_val(calc[libtemp6 * 100]) / 100] //round to 2 decimal places
#echo "exact baud rate achieved = libtemp8; bit period = libtemp7µs; baud rate error = libtemp6%"
//
ldi R16,calc[libtemp2 % 256]
out UBRR,R16
ldi R16,calc[libtemp2 \ 256]
out UBRRHI,R16
#if [libtemp10 == 1] ldi R16,0x40 //TXC
out UCSRA,R16
ldi R16,0x18 //RXEN, TXEN
out UCSRB,R16
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
//USR, i/o space 0-31,
//RXC TXC UDRE FE OR – – –
//UCR, i/o space 0-31,
//RXCIE TXCIE UDRIE RXEN TXEN CHR9 RXB8 TXB8
//UDR, i/o space 0-31,
//UBRR, i/o space 0-31,
#processor 90s2313
#processor 90s8515
#processor 90s8535
#statement_begin UART_Init baud_rate
#statement_type inline
#argument baud_rate, const libtemp0, byval 100-1000000
#code_begin
//
#math libtemp10 = 1 //baud rate generator mode
#math libtemp1 = calc[calc[calc[calc[Clock_Freq * 1000000] / libtemp0] / 16] - 1]
#math libtemp2 = calc[int_val(libtemp1)] //UBRR value
#math libtemp3 = calc[abs_val(libtemp2 - libtemp1)]
#if [libtemp3 > 0.5] #math libtemp2 = calc[libtemp2 + 1]
//
#math libtemp8 = calc[calc[Clock_Freq * 1000000] / calc[calc[libtemp2 + 1] * 16]] //exact baud rate achieved
#math libtemp7 = calc[1000000 / libtemp8] //bit period
#math libtemp6 = calc[calc[calc[abs_val(libtemp8 - libtemp0)] / libtemp0] * 100] //baud rate error
#math libtemp6 = calc[int_val(calc[libtemp6 * 100]) / 100] //round to 2 decimal places
#echo "exact baud rate achieved = libtemp8; bit period = libtemp7µs; baud rate error = libtemp6%"
//
ldi R16,calc[libtemp2]
out UBRR,R16
#if [libtemp10 == 1] ldi R16,0x40 //TXC
out USR,R16
ldi R16,0x18 //RXEN, TXEN
out UCR,R16
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
#processor mega8
#processor mega8a
#processor mega16
#processor mega16a
#processor mega32
#processor mega32a
#processor mega8515
#processor mega8535
#processor tiny2313
#processor tiny2313a, tiny4313
#processor 90s4433
#statement_begin UART_Write tx_data
#statement_type procedure
#statement_accept_multiple_arguments
#argument tx_data, byte system R31, byval
#code_begin
//
l1:
sbis UCSRA,UDRE
rjmp l1
out UDR,R31
//
#break_for_string_argument
l3:
ld R31,X+
andi R31,0xff
brne PC+2
ret
rcall l1
rjmp l3
//
#code_end
#statement_end
#statement_begin UART_Read rx_data
#statement_type procedure
#statement_accept_multiple_arguments
#argument rx_data, byte system R31, byrefout
#code_begin
//
l1:
sbis UCSRA,RXC
rjmp l1
in R31,UDR
//
#code_end
#statement_end
#statement_begin UART_Get rx_data
#statement_type procedure
#argument rx_data, byte system R31, byrefout
#variable UART_Data_Ready, byte
#code_begin
//
UART_Data_Ready = 0
mov R31,R15 //R31=0
sbis UCSRA,RXC
rjmp l1
UART_Data_Ready = 1
in R31,UDR
l1:
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
#processor mega48, mega88, mega168
#processor mega48p, mega88p, mega168p
#processor mega48a, mega48pa, mega88a, mega88pa, mega168a, mega168pa, mega328, mega328p
#processor mega165p
#processor mega165a, mega165pa, mega325a, mega325pa, mega3250a, mega3250pa, mega645a, mega645p, mega6450a, mega6450p
#processor mega169p
#processor mega169a, mega169pa, mega329a, mega329pa, mega649a, mega649p, mega3290a, mega3290pa, mega6490a, mega6490p
#processor mega325, mega3250, mega645, mega6450
#processor mega325p, mega3250p
#processor mega329, mega3290, mega649, mega6490
#processor mega644
#statement_begin UART_Write tx_data
#statement_type procedure
#statement_accept_multiple_arguments
#argument tx_data, byte system R31, byval
#code_begin
//
l1:
lds R16,UCSR0A
sbrs R16,UDRE0
rjmp l1
sts UDR0,R31
//
#break_for_string_argument
l3:
ld R31,X+
andi R31,0xff
brne PC+2
ret
rcall l1
rjmp l3
//
#code_end
#statement_end
#statement_begin UART_Read rx_data
#statement_type procedure
#statement_accept_multiple_arguments
#argument rx_data, byte system R31, byrefout
#code_begin
//
l1:
lds R16,UCSR0A
sbrs R16,RXC0
rjmp l1
lds R31,UDR0
//
#code_end
#statement_end
#statement_begin UART_Get rx_data
#statement_type procedure
#argument rx_data, byte system R31, byrefout
#variable UART_Data_Ready, byte
#code_begin
//
UART_Data_Ready = 0
mov R31,R15 //R31=0
lds R16,UCSR0A
sbrs R16,RXC0
rjmp l1
UART_Data_Ready = 1
lds R31,UDR0
l1:
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
#processor mega165
#processor mega169
#statement_begin UART_Write tx_data
#statement_type procedure
#statement_accept_multiple_arguments
#argument tx_data, byte system R31, byval
#code_begin
//
l1:
lds R16,UCSRA
sbrs R16,UDRE
rjmp l1
sts UDR,R31
//
#break_for_string_argument
l3:
ld R31,X+
andi R31,0xff
brne PC+2
ret
rcall l1
rjmp l3
//
#code_end
#statement_end
#statement_begin UART_Read rx_data
#statement_type procedure
#statement_accept_multiple_arguments
#argument rx_data, byte system R31, byrefout
#code_begin
//
l1:
lds R16,UCSRA
sbrs R16,RXC
rjmp l1
lds R31,UDR
//
#code_end
#statement_end
#statement_begin UART_Get rx_data
#statement_type procedure
#argument rx_data, byte system R31, byrefout
#variable UART_Data_Ready, byte
#code_begin
//
UART_Data_Ready = 0
mov R31,R15 //R31=0
lds R16,UCSRA
sbrs R16,RXC
rjmp l1
UART_Data_Ready = 1
lds R31,UDR
l1:
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
#processor 90s2313
#processor 90s8515
#processor 90s8535
#statement_begin UART_Write tx_data
#statement_type procedure
#statement_accept_multiple_arguments
#argument tx_data, byte system R31, byval
#code_begin
//
l1:
sbis USR,UDRE
rjmp l1
out UDR,R31
//
#break_for_string_argument
l3:
ld R31,X+
andi R31,0xff
brne PC+2
ret
rcall l1
rjmp l3
//
#code_end
#statement_end
#statement_begin UART_Read rx_data
#statement_type procedure
#statement_accept_multiple_arguments
#argument rx_data, byte system R31, byrefout
#code_begin
//
l1:
sbis USR,RXC
rjmp l1
in R31,UDR
//
#code_end
#statement_end
#statement_begin UART_Get rx_data
#statement_type procedure
#argument rx_data, byte system R31, byrefout
#variable UART_Data_Ready, byte
#code_begin
//
UART_Data_Ready = 0
mov R31,R15 //R31=0
sbis USR,RXC
rjmp l1
UART_Data_Ready = 1
in R31,UDR
l1:
//
#code_end
#statement_end
#lib_item_end
#lib_item_begin
#processor 90s2323, 90s2343
#processor tiny13
#processor tiny13a
#processor tiny24, tiny44, tiny84
#processor tiny24a, tiny44a, tiny84a
#processor tiny25, tiny45, tiny85
#processor tiny26
#processor tiny261, tiny461, tiny861
#processor tiny261a, tiny461a, tiny861a
#processor mega16m1, mega32m1, mega64m1
#statement n/a, UART_Init
#statement n/a, UART_Write
#statement n/a, UART_Read
#statement n/a, UART_Get
#lib_item_end
#lib_group_end